An innovationg AI Strat-Up is looking for the next Senior Verification Engineer!
5+ years of experience in chip verification
In-depth Knowledge in VLSI verification flow, languages & concepts
A deep understanding and proven experience in advanced dynamic verification processes
Experience in verification environments using SystemVerilog UVM
Scripting knowledge – perl, python, TCL, etc.
Electronics Engineering degree from a leading institution
איזור: גוש דן